ASML Raises Guidance but Shares Dip | Analysis by Brian Moineau

TL;DR

  • ASML reported a record €11.7B in Q3 2026 net sales with 57.5% gross margin, raised guidance again, and still saw shares wobble because bookings and macro sentiment didn’t signal fresh upside beyond an “AI forever” setup already in valuations. [1][2][8]
  • Management said customers want lithography slots locked through 2029–2030, yet 2027–2028 output will still trail demand—good for pricing power and upgrade revenue, but unit ceilings cap upside surprise. [2][3]
  • The next constraint sits upstream: Zeiss optics and 12‑inch photomasks dictate when High‑NA EUV moves from press releases to high‑volume wafers in Veldhoven, Hsinchu, Hwaseong, and Chandler. [4][5]

What the source said

Barron’s noted ASML shares slipped even as the company raised guidance and highlighted multi‑year tool demand tied to AI workloads. Management said customers are trying to secure systems into 2029–2030 and reiterated that supply in 2027–2028 won’t fully meet demand. The piece framed a scramble for scarce lithography capacity and asked why the stock didn’t rally if the AI boom has legs. The answer: investors want proof that foundries serving hyperscalers will keep ordering at this pace and that ASML can convert backlog to shipments on time. [1][3]

Why it matters

  • TSMC, Samsung, Intel Foundry, Micron, and SK hynix depend on 2027–2028 tool deliveries to hit roadmaps for N2/N3, HBM, and 1β/1γ DRAM; if ASML’s constrained supply persists, lead times extend, ramps slip, and capex tilts to productivity add‑ons. That dynamic flows through to Nvidia’s customers and rivals who buy capacity via those foundries. [2][3][4]

  • ASML’s Installed Base Management (service + upgrades) was ~€3.289B in Q3, or ~28% of net sales, acting as a cycle buffer and margin support while unit ceilings limit volume beats. Zeiss SMT remains the critical path for EUV and High‑NA scale; if optics output lags, High‑NA volume timelines slip everywhere. [2][5]

Original analysis

Consensus says “Q3 proved AI capex is intact, ASML lifted the outlook, and shares faded on ‘priced‑in’ strength—buy the dip.” My read: the selloff is rational because the quarter codifies a physical production ceiling through 2028, so upside is paced by bottlenecks, not by demand euphoria. The stock multiple won’t expand if units can’t grow faster than the chain allows, even with 57.5% gross margin tailwinds. [1][2][3]

Back‑of‑the‑envelope checks (FY 2026 math)

  • ASML guides 2026 sales to €44–45B; Q1–Q3 total ~€29.8B (8.8 + 9.3 + 11.7). To reach €44.5B midpoint, Q4 needs ~€14.7B—within the €14.2–15.2B guide, implying no heroic volume stretch; mix and margins decide upside. [2]
  • Mix reality: Q3 Installed Base Management was ~€3.289B, ~28% of net sales (3.289 / 11.662). That high‑margin, repeatable stream helps EPS but signals throughput upgrades, not a step‑function jump in system units. [2]
  • YoY lens: 2025 net sales were €32.7B; €44–45B implies ~35–38% growth. CFO Roger Dassen said 2026 is up ~36% versus 2025, matching the midpoint and shifting focus to execution. [7][6]

2×2 (2027–2028): Tool Access vs. Demand Certainty

  • Preferred access + hyperscaler‑anchored demand: TSMC, Samsung memory/HBM, Intel Foundry on select nodes; first in line and willing to pay for productivity, using High‑NA timing to set price/perf. [2][4][6]
  • Preferred access + speculative demand: Second‑tier logic ramps tied to smaller AI customers; risk over‑ordering into 2028 if inference ROI tightens.
  • Constrained access + hyperscaler‑anchored demand: DRAM players outside the top two; likely to lean on DUV immersion plus upgrades while waiting on EUV slots. [2]
  • Constrained access + speculative demand: Mainland China fabs under export rules; DUV for mature/ mainstream logic continues, but leading‑edge roadmaps remain throttled. [6]

Named‑stakeholder breakdown: TSMC, Samsung, Intel, Zeiss

  • TSMC: Secures early 2028 slots and can time High‑NA toward ~2030 mass production per Bloomberg, aligning with customer economics instead of hype. [4]
  • Samsung: Targets earlier High‑NA (~2028) for memory/logic and can arbitrage HBM throughput via upgrades while rivals queue. [4]
  • Intel Foundry: Already running High‑NA on select Intel 18A layers tied to Core Ultra Series 3—a signaling edge to court leading‑pitch customers. [6]
  • Zeiss SMT: Single‑threaded bottleneck on EUV/High‑NA optics; any slip at Zeiss delays everyone’s ramp. [5]

Contrarian read: multiples vs. unit ceilings in 2027–2028

  • “Can’t meet demand” boosts pricing and margins but suppresses the prospect of a unit surprise, capping multiple expansion; with Samsung near ~2028 and TSMC near ~2030 for High‑NA volume and tool prices around $400M, most 2027–2028 wafers will ride Low‑NA EUV + DUV upgrades. That’s solid economics but not a narrative catalyst for hypergrowth. [4]
  • Two overhangs persist: roughly ~20% China revenue mix stays policy‑sensitive if DUV controls tighten, and any incremental restriction would hit systems mix more than service. Those risks argue for patience versus a chase. [6]

What others are missing

Coverage focuses on orders through 2030, but the gating factor is the plumbing: Zeiss mirror/lens throughput and 12‑inch mask availability. High‑NA productivity hinges on multi‑year optics scale‑up at Zeiss SMT and on the September 2026 industry push—ASML, TSMC, Samsung, and Intel—to standardize 12‑inch photomasks that cut shot count and control line‑edge roughness. Until those two inputs are proven at volume, “orders into 2030” won’t translate to “wafers at cost” in Hsinchu or Hwaseong. That mismatch explains why 2027–2028 remains the hard ceiling, not a communications issue. [4][5]

What to watch next

  1. By Q1 2027, ASML details a plan to lift 2028 Low‑NA EUV and DUV immersion output above the previously indicated ~+30% capacity step, citing added optics lines at Zeiss and laser subsystem suppliers. [2][5]

  2. By Q4 2027, at least one non‑Intel production program (e.g., TSMC or Samsung) publicly confirms initial High‑NA usage on revenue wafers beyond test chips or demo lines. [4][6]

  3. Through FY 2027, ASML reports gross margin ≥56% as Installed Base Management offsets system unit ceilings, sustaining EPS even if chip stocks wobble. [2]

My take

The quarter is excellent, but bottlenecks rule the tape: output caps in 2027–2028 plus long‑lead optics and mask constraints mean compounding, not explosions. That tilts the setup toward owners who value service and upgrade annuities over unit spikes. I expect a re‑rate once High‑NA proves cost‑effective at volume and Zeiss optics scale visibly. Until then, buy weakness, but don’t pay for unit ramps the factory can’t ship; keep an eye on Zeiss, 12‑inch masks, and the ~20% China mix. [2][4][5][6]

Sources

[1] ASML Earnings Point to Soaring AI Chip Demand. Why the Stock Isn’t Budging. — Barron’s (https://www.barrons.com/articles/asml-earnings-stock-price-d0973c5c) — Stock reaction vs. raised guidance and multi‑year demand.

[2] ASML reports €11.7 billion total net sales and €5.0 billion net income in Q3 2026 — ASML Investor Relations (https://www.investor.asml.com/news-releases/news-release-details/asml-reports-eu11.7-billion-total-net-sales-and-eu5.0-billion-net-income-q3-2026) — Official Q3 results, Q4 guide, FY 2026 outlook, and statement that 2027–2028 supply won’t fully meet demand.

[3] Chip tool giant ASML nudges up outlook as AI-driven demand outruns supply — Reuters via Euronext Live (https://live.euronext.com/en/financial-news/chip-tool-giant-asml-nudges-outlook-ai-driven-demand-outruns-supply) — Confirmation of raised outlook, orders out to 2029–2030, and capacity shortfall through 2028.

[4] ASML, TSMC, Samsung, Intel Back 12-Inch Masks for AI Chips — Bloomberg (https://bloomberg.com/news/articles/2026-09-08/asml-tsmc-samsung-intel-back-12-inch-masks-for-ai-chips) — High‑NA adoption timing (Samsung ~2028, TSMC ~2030) and tool cost; mask initiative details.

[5] ASML’s EUV Expansion Runs Through Zeiss — EE Times (https://www.eetimes.com/asml-euv-expansion-runs-through-zeiss/) — Optics as the bottleneck; dependency on Zeiss SMT for EUV/High‑NA scaling.

[6] ASML Q2 2026 Investor Call Transcript — ASML (PDF) (https://ourbrand.asml.com/asset/1fd3908a-0381-47b5-9b69-a3094f656651/2026_07_15-ASML-Transcript-investor-call-Q2-2026.pdf) — China ~20% of sales, 30% 2027 capacity step for Low‑NA EUV/DUV, Intel Foundry’s early High‑NA use on 18A.

[7] Q4 2025 and Full‑Year 2025 Financial Results — ASML Investor Relations (https://www.investor.asml.com/news-releases/news-release-details/q4-2025-financial-results) — 2025 baseline revenue (€32.7B) for 2026 growth math.

[8] ASML Stock Falls Following a Slight Sales Miss in Q3 — Yahoo Finance (https://finance.yahoo.com/markets/stocks/articles/asml-stock-falls-following-slight-112840272.html) — Same‑day share reaction and “priced‑in” narrative post‑earnings.




Related update: We recently published an article that expands on this topic: read the latest post.


Related update: We recently published an article that expands on this topic: read the latest post.


Related update: We recently published an article that expands on this topic: read the latest post.

Trumps Chip Rule: A Tech Industry Crisis | Analysis by Brian Moineau

Trump’s Tariff-Tinged Dilemma: The Reality of US Chip Manufacturing

In the ever-evolving landscape of technology and international trade, the ongoing battle over chip manufacturing in the United States raises more questions than answers. Just when we thought the dust had settled, former President Trump has reignited the conversation with a proposed “1:1 chip rule.” But what does this mean for the future of US tech? Spoiler alert: it’s not good.

Understanding the 1:1 Chip Rule

To truly grasp the implications of Trump’s proposed 1:1 chip rule, we need to understand the context. The semiconductor industry is the backbone of modern technology, powering everything from smartphones to electric vehicles. However, the US has been facing significant challenges in domestic chip production, primarily due to globalization and competition from countries like China and Taiwan.

Trump’s administration previously introduced tariffs aimed at reshaping trade dynamics and boosting domestic manufacturing. Despite these efforts, the reality is that many US tech companies rely on overseas production to keep costs manageable and meet demand. The proposed 1:1 chip rule, which suggests that for every chip imported, a chip must be produced domestically, adds another layer of complexity to an already tangled web.

The Painful Reality for US Tech

So, what are the potential pitfalls of the 1:1 chip rule? As the article from The Register highlights, the rule could mean significant pain for US tech until Trump is out of office. Here are some key considerations:

Key Takeaways

– Increased Costs: Mandating domestic production could lead to skyrocketing costs for tech companies, which may ultimately be passed down to consumers.

– Supply Chain Disruption: The semiconductor supply chain is global. A sudden shift to domestic-only production could disrupt established supply chains, causing delays and shortages.

– Innovation Stifling: With the focus on meeting the 1:1 requirement, companies may divert resources away from research and development, stifling innovation in a rapidly advancing industry.

– Global Competitiveness at Risk: The US could fall behind in the global race for semiconductor technology, especially as competitors like China continue to ramp up their investments in chip manufacturing.

– Political Play: This proposal seems to be more about political posturing than practical economic strategy, raising questions about its long-term viability.

Concluding Reflection

As the world watches the unfolding saga of US chip manufacturing, it’s clear that the proposed 1:1 chip rule is fraught with challenges. While the desire to bolster domestic production is commendable, the practical implications of such a rule could lead to unintended consequences that hurt the very industry it aims to protect. As we navigate these turbulent waters, it’s essential for policymakers to consider the realities of global trade and the intricate nature of technology supply chains.

For now, we can only wait and see how this proposal unfolds, but one thing is certain: reality has a way of shaping policies, often in ways that are less than favorable for those caught in the middle.

Sources

– “Trump’s tariff‑shaped stick can’t beat reality on US chip fabbing.” The Register. [The Register](https://www.theregister.com) (search for the article).

Stay tuned for more insights on technology and trade as this story develops!




Related update: We recently published an article that expands on this topic: read the latest post.


Related update: We recently published an article that expands on this topic: read the latest post.


Related update: We recently published an article that expands on this topic: read the latest post.